Typically, a computer system includes a number of integrated circuits that communicate with one another to perform system applications. Often, the computer system includes one or more host controllers and one or more electronic subsystem assemblies, such as a dual in-line memory module (DIMM), a graphics card, an audio card, a facsimile card, and a modem card. To perform system functions, the host controller(s) and subsystem assemblies communicate via communication links, such as serial communication links and parallel communication links. Serial communication links include links that implement the fully buffered DIMM (FB-DIMM) advanced memory buffer (AMB) standard, the peripheral component interconnect express (PCIe) standard, or any other suitable serial communication link interface.
An AMB chip is a key device in a FB-DIMM. The AMB has two serial links, one for upstream traffic and the other for downstream traffic, and a bus to on-board memory, such as dynamic random access memory (DRAM) in the FB-DIMM. Serial data from the host controller sent through the downstream serial link (southbound) is temporarily buffered, and then sent to memory in the FB-DIMM. The serial data contains the address, data, and command information given to the memory, converted in the AMB, and sent out to the memory bus. The AMB writes in and reads out from the memory as instructed by the host controller. The read data is converted to serial data, and sent back to the host controller on the upstream serial link (northbound).
The AMB also performs as a repeater between FB-DIMMs on the same channel. The AMB transfers information from a primary southbound link connected to the host controller or an upper AMB to a lower AMB in the next FB-DIMM via a secondary southbound link. The AMB receives information in the lower FB-DIMM from a secondary northbound link, and after merging the information with information of its own, sends it to the upper AMB or host controller via a primary northbound link. This forms a daisy-chain among FB-DIMMs.
A key attribute of the FB-DIMM channel architecture is the high-speed, serial, point-to-point connection between the host controller and FB-DIMMs on the channel. The AMB standard is based on serial differential signaling, similar to PCIe.
PCIe is a high-speed, serial link that communicates data via differential signal pairs. A PCIe link is built around a bidirectional, serial, point-to-point connection known as a “lane”. At the electrical level, each lane utilizes two unidirectional low voltage differential signaling pairs, a transmit pair and a receive pair, for a total of 4 data wires per lane. A connection between any two PCIe devices is known as a “link”, and is built up from a collection of 1 or more lanes. All devices minimally support single-lane (×1) links. Devices may optionally support wider links composed of ×2, ×4, ×8, ×12, ×16, ×32, or more lanes.
The AMB and PCIe communication links use electrical idle as an electrical mechanism to signal state transitions. In an AMB chip, entering electrical idle is an indicator that a state has been completed and the AMB can be transitioned to the next state. Exiting electrical idle, i.e., entering the active mode, allows the next state to commence as the AMB receives active differential input signals on the inputs of the high-speed serial AMB link. Also, inband reset events are signaled by entry into electrical idle, which causes AMB's to complete a transition to the disabled or inactive state. In addition, in the event temperature exceeds a temperature limit, the AMB is disabled via entering the electrical idle state. The AMB and PCIe communication standards do not define dedicated inband signals for control.
For these and other reasons there is a need for the present invention.